1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device that writes data in a nonvolatile manner by applying a voltage to a variable resistive element and a method of resetting the same.
2. Description of the Related Art
In recent years, as nonvolatile memory devices, a ReRAM and a PCRAM gather attention as memories succeeding a flash memory. The ReRAM and the PCRAM store information of a resistance value of an electrically-rewritable variable resistive element in a nonvolatile manner. A variable resistive element as a storage element of the ReRAM has an electrode/metal oxide (bi-metallic or ternary-metallic oxide)/electrode structure. It is known that the variable resistive element has two operation modes. As one of the modes, a bipolar-type variable resistive element switches between a high resistance state and a low resistance state by changing the polarity of applied voltage. As the other mode, a unipolar-type variable resistive element switches between a high resistance state and a low resistance state by controlling a voltage value and application time without changing the polarity of applied voltage.
To realize a high-density memory cell array, it is preferable to use the unipolar-type variable resistive element. In the case of the unipolar-type variable resistive element, by stacking the variable resistive element and a rectifier element such as a diode at each cross point between a bit line and a word line, a cell array can be constructed without using a transistor. A three-dimensional multilayer resistance change memory aims at increase in a memory capacity by stacking memory layers without enlarging an area of an array (refer to Japanese PCT National Publication No. 2005-522045).
The case of using a unipolar-type variable resistive element will be examined. It is known that, by applying 1.5 V (in reality, about 2.1 V in BL when 0.6 V of Vf of a diode is included) or current of about 10 nA for a period of about 10 ns to 100 ns, the variable resistive element changes from the high resistance state to the low resistance state. This is called a setting operation.
By continuously applying a voltage of 0.6 V (in reality, about 1.6 V in BL when 1.0 V of Vf of a diode is included) or a current of 1 μA to 10 μA to the element in the set state for 500 ns to 2 μs, the element changes from the low resistance state to the high resistance state. This is called a resetting operation.
In reading operation, by applying a voltage of 0.4 V (in reality, about 1.2 V in BL when 0.8 V of Vf of a diode is included) to the variable resistive element and monitoring current flowing via the resistive element, whether the variable resistive element is in the low resistance state or the high resistance state is determined.
The resetting operation will be considered on the basis of the above-described preconditions. It is assumed that a set voltage VSET and a reset voltage VRESET are close to each other, and a parasitic resistance in a wire and the like of an array is large. In such a state, in the resetting operation, at the moment when the element changes from the low resistance to the high resistance, a voltage exceeding the set voltage VSET is applied to the ReRAM, and the ReRAM is set again. That is, erroneous setting occurs. As a countermeasure against the erroneous setting for a device, it is preferable to have a large difference between the set voltage VSET and the reset voltage VRESET.
In the resetting operation, a model of causing a phase change by heat generation is dominant. Therefore, it is expected that when the voltage of a reset pulse is set to be high, a generation amount of Joule heat increases (J=V·I·t), and a pulse width can be shortened. In this case, however, the possibility that the reset voltage VRESET becomes close to the set voltage VSET and it causes the erroneous setting problem becomes higher.